MEMORY DEVICE

申请公布号：DE3070140(D1)

申请号：DE19803070140

申请日期：1980.04.03

申请公布日期：1985.03.28

申请人：

NEC CORPORATION

发明人：ISHIMOTO, SHOJI

分类号：G11C11/401;G11C5/02;G11C11/406;G11C11/408;(IPC1-7):G11C11/24;G11C8/00

主分类号：G11C11/401

摘要：A memory device operable at high-speed and with low power consumption is disclosed. The device in which row address information and column address information are incorporated in synchronism with a row strobe signal and a column strobe signal, respectively, and refresh is effected in response to a row address, comprises a plurality of groups of selection gates for selectively supplying the incorporated column address information to a part of a plurality of column address decoders.

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